Sentinel

Sentinel is a complete Chip-Package-System (CPS) co-design/co-analysis solution addressing system-level power integrity, I/O-SSO, thermal, and EMI challenges.  It combines chip’s core switching power delivery network (PDN), I/O sub-system, and package / PCB models and analysis in a single environment for accurate chip-package-system co-design from early stage prototyping to signoff.

At the core of Sentinel is Chip Power Model (CPM), a compact spice compatible model of the full-chip PDN. During early stage prototyping, CPM enables designers to optimize package layers, power pads, and decaps, resulting in cost effective package designs. With CPM, designers gain higher degree of confidence in their package signoff by considering the impact of chip’s PDN on their package designs.

The Sentinel product line provides designers with complete CPS analysis and optimization for power, signal, and thermal integrity.

	A high capacity, high performance quasi-static electromagnetic modeling tool for IC packaging and System in Package (SiP) designs.
	A 3D full-wave electromagnetic solver for power and signal integrity analysis in package and PCBs, with the ability to perform DC, AC, and transient simulations from a single environment.
	An integrated die/package/board thermal and thermal/mechanical stress analysis solution.
	A high-capacity I/O sub-system timing and noise analysis solution targeted for IC and package SI designers.
	A compact and SPICE-accurate model of the full-chip power delivery network.
	Consists of die model representing noise source, 3D full-wave electromagnetic simulation, and tools to pinpoint the origin of noise within the chip.