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- PowerArtistRTL Design-for-Power: Power Reduction, Analysis, and Debug
- RedHawkSoC Power Integrity: Dynamic Power, Advanced Low Power, Reliability, and Chip-Package Co-design
- TotemAnalog Power, Noise and Reliability: Dynamic Power, Substrate Noise, EM, and ESD
- SentinelChip-Package-System Convergence: Power/Signal Integrity, IO-SSO, Thermal, and EMI
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- RTL to SiliconRTL power reduction, analysis, and signoff
- Analog to DigitalFull-chip mixed-signal power, noise, and reliability
- Chip-Package-SystemChip, package, system co-design / co-analysis
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PowerArtist
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PowerArtist is a complete RTL Design For Power (DFP)™ platform with fully-integrated advanced analysis and automatic reduction delivering 10% to 60% or more power savings. Comprehensive and automatic RTL power reduction is not just sequential and combinational clock gating, but is also targeted for memory and datapath portions of complex IPs and System-on-Chip (SOC) designs. The analysis-driven reduction approach, combined with a powerful yet intuitive user interface, selects and prioritizes power reduction opportunities for maximizing power savings in minimum time. PowerArtist-XP’s Visualize-Analyze-Reduce framework delivers predictable power reduction while minimizing impact on area, timing, functional ECO complexity and eliminating unnecessary iterations with downstream tools.
| A complete RTL Design For Power (DFP)™ platform with fully-integrated advanced analysis and automatic reduction. |

